588 search results - page 12 / 118 » Minimality Results for the Spatial Logics |
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
We provide a novel formulation for computing median filter with spatial regularization as minimizing a cost function composed of absolute value norms. We turn this cost minimizat...
ASPDAC
2004
ACM
14 years 28 days ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
FOSSACS
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Graph logic (GL) is a spatial logic for querying graphs introduced by Cardelli et al. It has been observed that in terms of expressive power, this logic is a fragment of ...
ISCAS
2003
IEEE
14 years 23 days ago
2003
IEEE
Ordered Binary Decision Diagrams (BDDs) are frequently used in logic synthesis. In this paper a new exact BDD minimization algorithm is presented, which is based on state space se...
ICES
2003
Springer
14 years 21 days ago
2003
Springer
Abstract. We present a systematic procedure for the synthesis and minimisation of digital circuits using propositional satisfiability. We encode the truth table into a canonical s...