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GLVLSI
2007
IEEE
135views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Exact sat-based toffoli network synthesis
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...
Daniel Große, Xiaobo Chen, Gerhard W. Dueck,...
ICCAD
1994
IEEE
114views Hardware» more  ICCAD 1994»
14 years 28 days ago
Performance-driven synthesis of asynchronous controllers
We examine the implications of a new hazard-free combinational logic synthesis method [8], which generates multiplexor trees from binary decision diagrams (BDDs) -- representation...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
ICC
2007
IEEE
104views Communications» more  ICC 2007»
14 years 3 months ago
A Novel Graph Model for Maximum Survivability in Mesh Networks under Multiple Generic Risks
— This paper investigates the path protection problem in mesh networks under multiple generic risks. Disjoint logical links may fail simultaneously if they share the same compone...
Qingya She, Xiaodong Huang, Jason P. Jue
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 2 months ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber
PADS
2004
ACM
14 years 2 months ago
Optimizing Parallel Execution of Detailed Wireless Network Simulation
With Parallel and Discrete Event Simulation (PDES) techniques, the runtime performance of detailed wireless network simulation can be improved significantly without compromising ...
Zhengrong Ji, Junlan Zhou, Mineo Takai, Jay Martin...