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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
VISUALIZATION
2005
IEEE
14 years 1 months ago
Topology-driven Surface Mappings with Robust Feature Alignment
Topological concepts and techniques have been broadly applied in computer graphics and geometric modeling. However, the homotopy type of a mapping between two surfaces has not bee...
Christopher Carner, Miao Jin, Xianfeng Gu, Hong Qi...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
14 years 29 days ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
PODC
2005
ACM
14 years 29 days ago
Primal-dual based distributed algorithms for vertex cover with semi-hard capacities
In this paper we consider the weighted, capacitated vertex cover problem with hard capacities (capVC). Here, we are given an undirected graph G = (V, E), non-negative vertex weigh...
Fabrizio Grandoni, Jochen Könemann, Alessandr...
ICALP
2005
Springer
14 years 28 days ago
Stochastic Steiner Trees Without a Root
Abstract. This paper considers the Steiner tree problem in the model of twostage stochastic optimization with recourse. This model, the focus of much recent research [1–4], tries...
Anupam Gupta, Martin Pál