The majority of current Network on Chip (NoC) architectures employ mesh topology and use simple static routing, to reduce power and area. However, regular mesh topology is unreali...
Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam...
Abstract—We study network optimization that considers energy minimization as an objective. Studies have shown that mechanisms such as speed scaling can significantly reduce the ...
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
—We investigate restructuring techniques based on decomposition/factorization, with the objective to move critical signals toward the output while minimizing area. A specific ap...
Anna Bernasconi, Valentina Ciriani, Gabriella Truc...
In this work we propose a convex relaxation approach
for computing minimal partitions. Our approach is based
on rewriting the minimal partition problem (also known as
Potts mode...
Thomas Pock (Graz University of Technology), Anton...