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DATE
2006
IEEE
159views Hardware» more  DATE 2006»
14 years 1 months ago
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
SCOPES
2004
Springer
14 years 1 months ago
Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization
For mobile embedded systems, the energy consumption is a limiting factor because of today’s battery capacities. Besides the processor, memory accesses consume a high amount of en...
Heiko Falk, Manish Verma
DAC
2012
ACM
11 years 10 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
IPPS
2007
IEEE
14 years 1 months ago
Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems
Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a n...
Nazish Aslam, Mark Milward, Ioannis Nousias, Tughr...
ASPLOS
2006
ACM
14 years 1 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal