Sciweavers

1079 search results - page 213 / 216
» Model Driven Prediction and Control
Sort
View
DAC
2002
ACM
14 years 11 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy
DSD
2009
IEEE
144views Hardware» more  DSD 2009»
14 years 5 months ago
Composable Resource Sharing Based on Latency-Rate Servers
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...
Benny Akesson, Andreas Hansson, Kees Goossens
HPDC
2009
IEEE
14 years 5 months ago
Exploring data reliability tradeoffs in replicated storage systems
This paper explores the feasibility of a cost-efficient storage architecture that offers the reliability and access performance characteristics of a high-end system. This architec...
Abdullah Gharaibeh, Matei Ripeanu
CF
2009
ACM
14 years 5 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
ICSE
2010
IEEE-ACM
14 years 3 months ago
Adaptive bug isolation
Statistical debugging uses lightweight instrumentation and statistical models to identify program behaviors that are strongly predictive of failure. However, most software is most...
Piramanayagam Arumuga Nainar, Ben Liblit