733 search results - page 126 / 147 » Model Reuse through Hardware Design Patterns |
BMCBI
2007
13 years 7 months ago
2007
Background: One of the essential processing events during pre-mRNA maturation is the posttranscriptional addition of a polyadenine [poly(A)] tail. The 3'-end poly(A) track pr...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
SIGMETRICS
2011
ACM
12 years 10 months ago
2011
ACM
Cloud computing, social networking and information networks (for search, news feeds, etc) are driving interest in the deployment of large data centers. TCP is the dominant Layer 3...
ICS
2005
Tsinghua U.
14 years 27 days ago
2005
Tsinghua U.
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
ANTSW
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. We study through simulation the performance of two MANET routing algorithms in a realistic urban environment. The two algorithms, AODV and AntHocNet, are representative o...