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» Model Reuse through Hardware Design Patterns
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ASPLOS
2008
ACM
13 years 9 months ago
Learning from mistakes: a comprehensive study on real world concurrency bug characteristics
The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Addressing this challenge requires adva...
Shan Lu, Soyeon Park, Eunsoo Seo, Yuanyuan Zhou
DAC
2006
ACM
14 years 8 months ago
Prediction-based flow control for network-on-chip traffic
Networks-on-Chip (NoC) architectures provide a scalable solution to on-chip communication problem but the bandwidth offered by NoCs can be utilized efficiently only in presence of...
Ümit Y. Ogras, Radu Marculescu
ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
13 years 11 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
CLUSTER
2004
IEEE
13 years 11 months ago
Application-specific scheduling for the organic grid
We propose a biologically inspired and fully-decentralized approach to the organization of computation that is based on the autonomous scheduling of strongly mobile agents on a pe...
Arjav J. Chakravarti, Gerald Baumgartner, Mario La...
VISUALIZATION
2005
IEEE
14 years 28 days ago
Particle and Texture Based Spatiotemporal Visualization of Time-Dependent Vector Fields
We propose a hybrid particle and texture based approach for the visualization of time-dependent vector fields. The underlying spacetime framework builds a dense vector field rep...
Daniel Weiskopf, Frederik Schramm, Gordon Erlebach...