59 search results - page 8 / 12 » Modeling Cache Effects at the Transaction Level |
PLDI
2009
ACM
14 years 2 months ago
2009
ACM
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a w...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
ICCD
2000
IEEE
13 years 11 months ago
2000
IEEE
A major obstacle to widespread acceptance of formal verification is the difficulty in using the tools effectively. Although learning the basic syntax and operation of a formal ver...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Software cache-based side channel attacks present serious threats to modern computer systems. Using caches as a side channel, these attacks are able to derive secret keys used in ...