356 search results - page 13 / 72 » Modeling Cache Sharing on Chip Multiprocessor Architectures |
VLSID
2008
IEEE
14 years 9 months ago
2008
IEEE
Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restri...
JSA
2008
13 years 8 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
RTSS
2007
IEEE
14 years 2 months ago
2007
IEEE
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
ISCA
1998
IEEE
14 years 25 days ago
1998
IEEE
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...