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ISLPED
1999
ACM
86views Hardware» more  ISLPED 1999»
13 years 12 months ago
Power macro-models for DSP blocks with application to high-level synthesis
Abstract – In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, suc...
Subodh Gupta, Farid N. Najm
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
14 years 25 days ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
INFOCOM
2007
IEEE
14 years 1 months ago
Low-Complexity and Distributed Energy Minimization in Multi-Hop Wireless Networks
— In this work, we study the problem of minimizing the total power consumption in a multi-hop wireless network subject to a given offered load. It is well-known that the total po...
Longbi Lin, Xiaojun Lin, Ness B. Shroff
DAC
2000
ACM
14 years 8 months ago
Power analysis of embedded operating systems
The increasing complexity and software content of embedded systems has led to the common use of sophisticated system software that helps applications use the underlying hardware r...
Robert P. Dick, Ganesh Lakshminarayana, Anand Ragh...
ASPDAC
1995
ACM
104views Hardware» more  ASPDAC 1995»
13 years 11 months ago
Power analysis of a 32-bit embedded microcontroller
A new approach for power analysis of microprocessorshas recently been proposed [1]. The idea is to look at the power consumption in a microprocessor from the point of view of the ...
Vivek Tiwari, Mike Tien-Chien Lee