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ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
14 years 5 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
ISCA
2007
IEEE
171views Hardware» more  ISCA 2007»
14 years 3 months ago
Power provisioning for a warehouse-sized computer
Large-scale Internet services require a computing infrastructure that can be appropriately described as a warehouse-sized computing system. The cost of building datacenter facilit...
Xiaobo Fan, Wolf-Dietrich Weber, Luiz André...
MEMOCODE
2006
IEEE
14 years 2 months ago
802.11a transmitter: a case study in microarchitectural exploration
Hand-held devices have rigid constraints regarding power dissipation and energy consumption. Whether a new functionality can be supported often depends upon its power requirements...
Nirav Dave, Michael Pellauer, S. Gerding, Arvind
ISQED
2010
IEEE
151views Hardware» more  ISQED 2010»
14 years 3 months ago
Leakage temperature dependency modeling in system level analysis
Abstract— As the semiconductor technology continues its marching toward the deep sub-micron domain, the strong relation between leakage current and temperature becomes critical i...
Huang Huang, Gang Quan, Jeffrey Fan
ISCAS
1999
IEEE
79views Hardware» more  ISCAS 1999»
14 years 1 months ago
Energy minimization of system pipelines using multiple voltages
Modem computer and communication system design has to consider the timing constraints imposed by communication and system pipelines, and minimize the energy consumption. We adopt ...
Gang Qu, Darko Kirovski, Miodrag Potkonjak, Mani B...