Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
This paper presents an equation-based resource utilization model for automatically generated discrete Fourier transform (DFT) soft core IPs. The parameterized DFT IP generator all...
Peter A. Milder, Mohammad Ahmad, James C. Hoe, Mar...
User Interfaces for Mobile Processes Sonja Zaplata, Ante Vilenica, Dirk Bade, Christian P. Kunze Distributed Systems and Information Systems, Computer Science Department, Universit...
Sonja Zaplata, Ante Vilenica, Dirk Bade, Christian...