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» Modeling User Runtime Estimates
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ISCA
2010
IEEE
219views Hardware» more  ISCA 2010»
14 years 4 months ago
Using hardware vulnerability factors to enhance AVF analysis
Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
Vilas Sridharan, David R. Kaeli
DAC
1997
ACM
14 years 3 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
DAC
2005
ACM
15 years 4 days ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
FPGA
2006
ACM
139views FPGA» more  FPGA 2006»
14 years 2 months ago
Fast and accurate resource estimation of automatically generated custom DFT IP cores
This paper presents an equation-based resource utilization model for automatically generated discrete Fourier transform (DFT) soft core IPs. The parameterized DFT IP generator all...
Peter A. Milder, Mohammad Ahmad, James C. Hoe, Mar...
KIVS
2009
Springer
14 years 5 months ago
Abstract User Interfaces for Mobile Processes
User Interfaces for Mobile Processes Sonja Zaplata, Ante Vilenica, Dirk Bade, Christian P. Kunze Distributed Systems and Information Systems, Computer Science Department, Universit...
Sonja Zaplata, Ante Vilenica, Dirk Bade, Christian...