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ICECCS
2010
IEEE
219views Hardware» more  ICECCS 2010»
13 years 9 months ago
Comparison of Six Ways to Extend the Scope of Cheddar to AADL v2 with Osate
Abstract—Cheddar is a framework dedicated to the specification of real-time schedulers, and to their analysis by simulation. It is developed in Ada. Some parts of its modular ar...
Mickaël Kerboeuf, Alain Plantec, Frank Singho...
IEEEPACT
2003
IEEE
14 years 2 months ago
Constraint Graph Analysis of Multithreaded Programs
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
Harold W. Cain, Mikko H. Lipasti, Ravi Nair
PLDI
2003
ACM
14 years 2 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
CASES
2007
ACM
14 years 1 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
ASPLOS
2010
ACM
14 years 3 months ago
Cortical architectures on a GPGPU
As the number of devices available per chip continues to increase, the computational potential of future computer architectures grows likewise. While this is a clear benefit for f...
Andrew Nere, Mikko Lipasti