588 search results - page 26 / 118 » Modeling and Verifying Circuits Using Generalized Relative T... |
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
ECOWS
2008
Springer
13 years 9 months ago
2008
Springer
Executable business process models build on the specification of process activities, their implemented business functions (e.g., Web services) and the control flow between these a...
ITC
1998
IEEE
14 years 6 days ago
1998
IEEE
A method for measuring inter-symbol interference, duty cycle distortion, random jitter and periodic jitter is described. The Blackman-Tukey method of signal analysis is used. This...
DAC
2010
ACM
13 years 12 months ago
2010
ACM
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...