588 search results - page 54 / 118 » Modeling and Verifying Circuits Using Generalized Relative T... |
EOR
2006
13 years 8 months ago
2006
When two competing and incompatible products coexist in a market, potential users face a choice between the two products and the alternative of deferring the decision. This paper ...
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...
WSC
2007
13 years 10 months ago
2007
Workflow analysis is an important component in the simulation of construction operations. It involves creating a specific number of work requests for a crew every time period, com...
ICCAD
1999
IEEE
14 years 11 days ago
1999
IEEE
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...