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DATE
2003
IEEE
134views Hardware» more  DATE 2003»
14 years 1 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
ALGOSENSORS
2004
Springer
13 years 11 months ago
Towards a Dynamical Model for Wireless Sensor Networks
In this paper we introduce a dynamical model for wireless sensor networks. We obtain a convergent martingale for the broadcast process in such networks. To our knowledge, such mart...
Pierre Leone, José D. P. Rolim
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
13 years 6 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
PADS
2003
ACM
14 years 1 months ago
Scalable RTI-Based Parallel Simulation of Networks
Federated simulation interfaces such as the High Level Architecture (HLA) were designed for interoperability, and as such are not traditionally associated with highperformance com...
Kalyan S. Perumalla, Alfred Park, Richard M. Fujim...
TC
2008
13 years 8 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...