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EMSOFT
2007
Springer
14 years 1 months ago
WCET estimation for executables in the presence of data caches
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
Rathijit Sen, Y. N. Srikant
RTCSA
1999
IEEE
13 years 12 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl
RTSS
2007
IEEE
14 years 1 months ago
Toward the Predictable Integration of Real-Time COTS Based Systems
The integration phase of real-time COTS-based systems is often problematic because when multiple tasks run concurrently, the interference at the bus level between cache fetching a...
Rodolfo Pellizzoni, Marco Caccamo
RTAS
2008
IEEE
14 years 2 months ago
Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
Jack Whitham, Neil C. Audsley
CORR
2007
Springer
111views Education» more  CORR 2007»
13 years 7 months ago
Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software
Safety-criticalembeddedsystems having to meet real-time constraints are to be highlypredictable in order to guarantee at design time that certain timing deadlines will always be m...
Lars Wehmeyer, Peter Marwedel