Sciweavers

222 search results - page 34 / 45
» Modeling transactional memory workload performance
Sort
View
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
14 years 1 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
ECRTS
2008
IEEE
14 years 3 months ago
Backlog Estimation and Management for Real-Time Data Services
Real-time data services can benefit data-intensive real-time applications, e.g., e-commerce, via timely transaction processing using fresh data, e.g., the current stock prices. T...
Kyoung-Don Kang, Jisu Oh, Yan Zhou
ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
14 years 2 months ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
IPPS
1998
IEEE
14 years 29 days ago
Configuration Independent Analysis for Characterizing Shared-Memory Applications
Characterizing shared-memory applications provides insight to design efficient systems, and provides awareness to identify and correct application performance bottlenecks. Configu...
Gheith A. Abandah, Edward S. Davidson
SIGMOD
2009
ACM
213views Database» more  SIGMOD 2009»
14 years 9 months ago
Dictionary-based order-preserving string compression for main memory column stores
Column-oriented database systems [19, 23] perform better than traditional row-oriented database systems on analytical workloads such as those found in decision support and busines...
Carsten Binnig, Stefan Hildenbrand, Franz Fär...