Sciweavers

38 search results - page 6 / 8
» Modeling wire delay, area, power, and performance in a simul...
Sort
View
INFOCOM
1997
IEEE
14 years 2 months ago
Investigation of the IEEE 802.11 Medium Access Control (MAC)
Analysis of the drafi IEEE 802.11 wireless local area network (WLAN) standard is needed to characterize the expected performance of the standard’s ad hoc and infrastructure netw...
Brian P. Crow, Indra Widjaja, Jeong Geun Kim, Pres...
DAC
2004
ACM
14 years 11 months ago
FPGA power reduction using configurable dual-Vdd
Power optimization is of growing importance for FPGAs in nanometer technologies. Considering dual-Vdd technique, we show that configurable power supply is required to obtain a sat...
Fei Li, Yan Lin, Lei He
MICRO
2006
IEEE
98views Hardware» more  MICRO 2006»
14 years 4 months ago
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring...
Chrysostomos Nicopoulos, Dongkook Park, Jongman Ki...
CASES
2004
ACM
14 years 3 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
14 years 11 days ago
Power grid analysis benchmarks
ACT Benchmarks are an immensely useful tool in performing research since they allow for rapid and clear comparison between different approaches to solving CAD problems. Recent expe...
Sani R. Nassif