1151 search results - page 6 / 231 » Modelling Digital Circuits Problems with Set Constraints |
TCAD
2002
13 years 7 months ago
2002
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
TVLSI
2008
13 years 7 months ago
2008
The proposed work involves conversion of a given circuit model into a set of constraints and employing constraint solvers to generate tests for it. The method is demonstrated for ...
CONSTRAINTS
2007
13 years 7 months ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
AI
2004
Springer
13 years 7 months ago
2004
Springer
We propose a new translation from normal logic programs with constraints under the answer set semantics to propositional logic. Given a normal logic program, we show that by addin...