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» Models of Computation for Networks on Chip
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ICPADS
2008
IEEE
14 years 2 months ago
A Performance Model of Communication in the Quarc NoC
Networks On-Chip (NoC) emerged as a promising communication medium for future MPSoC development. To serve this purpose, the NoCs have to be able to efficiently exchange all types...
Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi
ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Improved on-chip router analytical power and area modeling
Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence o...
Andrew B. Kahng, Bill Lin, Kambiz Samadi
ANOR
2008
112views more  ANOR 2008»
13 years 7 months ago
Analysis of a tandem network model of a single-router Network-on-Chip
We study a single-router Network-on-Chip modelled as a tandem queueing network. The first node is a geoK /D/1 queue (K fixed) representing a network interface, and the second node...
Paul Beekhuizen, Dee Denteneer, Ivo J. B. F. Adan