6229 search results - page 15 / 1246 » Models of Computation for Networks on Chip |
IJCNN
2000
IEEE
13 years 12 months ago
2000
IEEE
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
IPPS
2008
IEEE
14 years 1 months ago
2008
IEEE
With the emergence of multicore network processors in support of high-performance computing and networking applications, power consumption has become a problem of increasing signi...
ISQED
2003
IEEE
14 years 25 days ago
2003
IEEE
—As the operating frequency of digital systems increases and voltage swing decreases, it becomes very important to characterize and analyze power distribution networks (PDNs) acc...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper we present NoCEE, a fast and accurate method for extracting energy models for packet-switched Network on Chip (NoC) routers. Linear regression is used to model the r...