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» Models of Computation for Networks on Chip
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IEEEPACT
2009
IEEE
15 years 10 months ago
Oblivious Routing in On-Chip Bandwidth-Adaptive Networks
—Oblivious routing can be implemented on simple router hardware, but network performance suffers when routes become congested. Adaptive routing attempts to avoid hot spots by re-...
Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel...
TCAD
2010
105views more  TCAD 2010»
14 years 10 months ago
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Adán Kohler, Gert Schley, Martin Radetzki
ISQED
2007
IEEE
206views Hardware» more  ISQED 2007»
15 years 10 months ago
Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, ...
NOCS
2010
IEEE
15 years 2 months ago
A Low-Overhead Asynchronous Interconnection Network for GALS Chip Multiprocessors
A new asynchronous interconnection network is introduced for globally-asynchronous locally-synchronous (GALS) chip multiprocessors. The network eliminates the need for global cloc...
Michael N. Horak, Steven M. Nowick, Matthew Carlbe...
AINA
2007
IEEE
15 years 4 months ago
Detecting Anomaly Node Behavior in Wireless Sensor Networks
Wireless sensor networks are usually deployed in a way “once deployed, never changed”. The actions of sensor nodes are either pre-scheduled inside chips or triggered to respon...
Qinghua Wang, Tingting Zhang