6229 search results - page 24 / 1246 » Models of Computation for Networks on Chip |
RTSS
2008
IEEE
14 years 3 months ago
2008
IEEE
—Wormhole switching with fixed priority preemption has been proposed as a possible solution for real-time on-chip communication. However, none of current priority assignment pol...
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...
EUROPAR
2010
Springer
13 years 9 months ago
2010
Springer
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Managing the complexity of designing chips containing billions of transistors requires decoupling computation from communication. For the communication, scalable and compositional...
DSD
2006
IEEE
14 years 13 days ago
2006
IEEE
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...