6229 search results - page 27 / 1246 » Models of Computation for Networks on Chip |
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
IESS
2007
Springer
14 years 2 months ago
2007
Springer
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
LCTRTS
2010
Springer
14 years 3 months ago
2010
Springer
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...