6229 search results - page 30 / 1246 » Models of Computation for Networks on Chip |
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
NIPS
1990
13 years 10 months ago
1990
Inspired by a visual motion detection model for the rabbit retina and by a computational architecture used for early audition in the barn owl, we have designed a chip that employs...
SLIP
2006
ACM
14 years 2 months ago
2006
ACM
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
ISPASS
2006
IEEE
14 years 2 months ago
2006
IEEE
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...