6229 search results - page 43 / 1246 » Models of Computation for Networks on Chip |
DAC
1998
ACM
14 years 9 months ago
1998
ACM
- A closed form solution for the output signal of a CMOS inverter driving an RLC transmission line is presented. This solution is based on the alpha power law for deep submicromete...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
— This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper wil...
ICS
2000
Tsinghua U.
14 years 12 days ago
2000
Tsinghua U.
The rapid advancements of networking technology have boosted potential bandwidth to the point that the cabling is no longer the bottleneck. Rather, the bottlenecks lie at the cros...
ITNG
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents several parallel FFT algorithms with different degree of communication overhead for multiprocessors in Network-on-Chip(NoC) environment. Three different method...
HPCA
2000
IEEE
14 years 1 months ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...