6229 search results - page 50 / 1246 » Models of Computation for Networks on Chip |
IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
DAC
1999
ACM
14 years 1 months ago
1999
ACM
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
ICC
2007
IEEE
14 years 3 months ago
2007
IEEE
—The use of adaptively-routed wormhole switched k-ary n-cubes has been motivated by the high path diversity provided by the rich topology of this family of interconnection networ...
GCC
2003
Springer
14 years 2 months ago
2003
Springer
This paper applies a new traffic model, iterated function systems (IFS) for network traffic modelling, to explore computer network behaviour and analyse network performance. IFS mo...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract—We describe a neuromorphic chip with a twolayer excitatory-inhibitory recurrent network of spiking neurons that exhibits localized clusters of neural activity. Unlike ot...