6229 search results - page 96 / 1246 » Models of Computation for Networks on Chip |
PVLDB
2010
13 years 7 months ago
2010
Shortest path computation is one of the most common queries in location-based services that involve transportation networks. Motivated by scalability challenges faced in the mobil...
DAC
1998
ACM
14 years 10 months ago
1998
ACM
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
ISQED
2007
IEEE
14 years 3 months ago
2007
IEEE
Parameter variation in integrated circuits causes sections of a chip to be slower than others. To prevent any resulting timing errors, designers have traditionally designed for th...
BMCBI
2005
13 years 8 months ago
2005
Background: A major challenge in computational genomics is the development of methodologies that allow accurate genome-wide prediction of the regulatory targets of a transcription...
VLSID
2004
IEEE
14 years 9 months ago
2004
IEEE
Dynamic noise analysis is greatly needed in place of traditional static noise analysis due to the ever increasingly stringent design requirement for VLSI chips based on very deep ...