We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
This paper presents a wrapper and TAM co-optimization method for reuse of SoC functional interconnects to minimize test time under area constraint. The proposed method consists of...
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
This article examines cognitive process models of human sentence comprehension based on the idea of informed search. These models are rational in the sense that they strive to qui...
The dynamic behavior of systems is best described by Finite-state machines. Generation of executable tests from behavioral models such as UML Statecharts offers benefits such as s...
P. V. R. Murthy, P. C. Anitha, M. Mahesh, Rajesh S...