Previous works on buffer planning are mainly based on fixed die placement. It is necessary to reduce the complexity of computing the feasible buffer insertion sites to integrate t...
Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, ...
Abstract--In this paper, the problem of bus driven floorplanning is addressed. Given a set of modules and bus specifications, a floorplan solution including the bus routes will be ...
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated Annealing (SA). The proposed architecture achieves ...
In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/v...
Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. W...
This paper presents a new meta heuristic algorithm based on the search method called simulated annealing, and its application to solving multi objective simulation optimization pr...
Eduardo Alberto Avello, Felipe F. Baesler, Reinald...