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» Modularity Analysis of Logical Design Models
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VLSID
2006
IEEE
156views VLSI» more  VLSID 2006»
14 years 8 months ago
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
Jungsub Kim, Mary Jane Irwin, Narayanan Vijaykrish...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 1 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
ICNC
2005
Springer
14 years 1 months ago
Credit Rating Analysis with AFS Fuzzy Logic
In this paper, we propose a new machine learning approach based on AFS (Axiomatic Fuzzy Sets) fuzzy logic, in attempt to provide a better model with interpretability. First, we wil...
Xiaodong Liu, Wanquan Liu
CAV
2000
Springer
197views Hardware» more  CAV 2000»
13 years 12 months ago
Bounded Model Construction for Monadic Second-Order Logics
Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A. Pnueli Invited Address...
Abdelwaheb Ayari, David A. Basin
GLVLSI
2006
IEEE
115views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
Song Peng, Rajit Manohar