575 search results - page 4 / 115 » Multi-Valued Logic Synthesis |
ICFP
2012
ACM
12 years 6 days ago
2012
ACM
The higher-order logic found in proof assistants such as Coq and various HOL systems provides a convenient setting for the development and verification of pure functional program...
ICCAD
1998
IEEE
14 years 2 months ago
1998
IEEE
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
DAC
2000
ACM
14 years 2 months ago
2000
ACM
In many modern designs, timing is either a key optimization goal and/or a mandatory constraint. We propose the first intellectual property protection technique using watermarking ...
DAC
2012
ACM
12 years 6 days ago
2012
ACM
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
ICCAD
2007
IEEE
14 years 6 months ago
2007
IEEE
— The research in the field of reversible logic is motivated by its application in low-power design, optical computing and quantum computing. Hence synthesis of reversible logic...