Sciweavers

575 search results - page 51 / 115
» Multi-Valued Logic Synthesis
Sort
View
ICCAD
2003
IEEE
129views Hardware» more  ICCAD 2003»
14 years 6 months ago
ILP Models for the Synthesis of Asynchronous Control Circuits
A new technique for the logic synthesis of asynchronous circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. The technique is ...
Josep Carmona, Jordi Cortadella
DAC
1996
ACM
14 years 2 months ago
POSE: Power Optimization and Synthesis Environment
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
Sasan Iman, Massoud Pedram
GECCO
2006
Springer
202views Optimization» more  GECCO 2006»
14 years 1 months ago
Human competitive security protocols synthesis
This poster paper outlines a method for a search based approach to the development of provably correct protocols. Categories and Subject Descriptors C.2.2 [Computer Communication ...
Hao Chen, John A. Clark, Jeremy Jacob
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
14 years 4 months ago
Accurate and scalable reliability analysis of logic circuits
Reliability of logic circuits is emerging as an important concern that may limit the benefits of continued scaling of process technology and the emergence of future technology al...
Mihir R. Choudhury, Kartik Mohanram
CONCUR
2006
Springer
14 years 1 months ago
Controller Synthesis for MTL Specifications
Abstract. We consider the control problem for timed automata against specifications given as MTL formulas. The logic MTL is a linear-time timed temporal logic which extends LTL wit...
Patricia Bouyer, Laura Bozzelli, Fabrice Chevalier