575 search results - page 58 / 115 » Multi-Valued Logic Synthesis |
ASYNC
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper presents a new approach to two-level hazardfree sum-of-products logic minimization. No currently available minimizers for single-output literal-exact two-level hazard-f...
IADIS
2004
13 years 11 months ago
2004
OWL DL, being established by W3C, is a Knowledge Representation Markup Language for the Semantic Web. OWL DL is a new synthesis of research on KRML for the Semantic Web, which nee...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
In this paper, we present a new linear-time retiming algorithm that produces near-optimal results. Our implementation is specifically targeted at Altera's Stratix [1] FPGAbas...
KI
2007
Springer
14 years 4 months ago
2007
Springer
Abstract. We compare three systems for the task of synthesising functional recursive programs, namely Adate, an approach through evolutionary computation, the classification learn...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...