Sciweavers

575 search results - page 76 / 115
» Multi-Valued Logic Synthesis
Sort
View
GPCE
2008
Springer
13 years 11 months ago
Property models: from incidental algorithms to reusable components
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
Jaakko Järvi, Mat Marcus, Sean Parent, John F...
MSE
2005
IEEE
150views Hardware» more  MSE 2005»
14 years 3 months ago
A Cohesive FPGA-Based System-on-Chip Design Curriculum
A graduate-level computer engineering course sequence at the OGI School of Science and Engineering teaches state-of-the-art digital system design practices and system-on-chip desi...
John D. Lynch, Daniel Hammerstrom, Roy Kravitz
VTS
2005
IEEE
116views Hardware» more  VTS 2005»
14 years 3 months ago
Closed-Form Simulation and Robustness Models for SEU-Tolerant Design
— A closed-form model for simulation and analysis of voltage transients caused by single-event upsets (SEUs) in logic circuits is described. A linear RC model, derived using a SP...
Kartik Mohanram
DAC
1996
ACM
14 years 2 months ago
Delay Minimal Decomposition of Multiplexers in Technology Mapping
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
ATAL
1995
Springer
14 years 1 months ago
Time, Knowledge, and Choice
Abstract. This article considers the link between theory and practice in agentoriented programming. We begin by rigorously defining a new formal specification language for autono...
Michael Wooldridge