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ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
14 years 7 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok
ISCAS
2002
IEEE
82views Hardware» more  ISCAS 2002»
14 years 3 months ago
Logic synthesis for PLA with 2-input logic elements
In this paper, we present a new logic synthesis method for PLA with 2-input logic elements. A PLA with 2-input logic elements can achieve low-power dissipation and high-speed oper...
Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Ku...
ICCAD
2002
IEEE
112views Hardware» more  ICCAD 2002»
14 years 3 months ago
ATPG-based logic synthesis: an overview
The ultimate goal of logic synthesis is to explore implementation flexibility toward meeting design targets, such as area, power, and delay. Traditionally, such flexibility is exp...
Chih-Wei Jim Chang, Malgorzata Marek-Sadowska
VLSID
1997
IEEE
98views VLSI» more  VLSID 1997»
14 years 3 months ago
Synthesis for Logical Initializability of Synchronous Finite State Machines
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick
CL
2000
Springer
14 years 3 months ago
Logic Program Synthesis in a Higher-Order Setting
We describe a system for the synthesis of logic programs from specifications based on higher-order logical descriptions of appropriate refinement operations. The system has been ...
David Lacey, Julian Richardson, Alan Smaill