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» Multi-level network optimization for low power
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ICCAD
1996
IEEE
131views Hardware» more  ICCAD 1996»
13 years 11 months ago
Multi-level logic optimization for low power using local logic transformations
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
Qi Wang, Sarma B. K. Vrudhula
PIMRC
2008
IEEE
14 years 1 months ago
Concurrent and parallel transmissions are optimal for low data-rate IR-UWB networks
— The Internet of Things, emerging pervasive and sensor networks are low data-rate wireless networks with, a priori, no specific topology and no fixed infrastructure. Their pri...
Jean-Yves Le Boudec, Ruben Merz
ICCAD
2002
IEEE
113views Hardware» more  ICCAD 2002»
14 years 4 months ago
Interconnect-aware high-level synthesis for low power
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
Lin Zhong, Niraj K. Jha
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 17 days ago
Low power coordination in wireless ad-hoc networks
Distributed wireless ad-hoc networks (DWANs) pose numerous technical challenges. Among them, two are widely considered as crucial: autonomous localized operation and minimization ...
Farinaz Koushanfar, Abhijit Davare, Dai Tho Nguyen...
TMC
2010
159views more  TMC 2010»
13 years 5 months ago
Radio Sleep Mode Optimization in Wireless Sensor Networks
—Energy-efficiency is a central challenge in sensor networks, and the radio is a major contributor to overall energy node consumption. Current energy-efficient MAC protocols fo...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...