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ICCD
2003
IEEE
104views Hardware» more  ICCD 2003»
14 years 4 months ago
On Reducing Register Pressure and Energy in Multiple-Banked Register Files
The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce ...
Jaume Abella, Antonio González
OOPSLA
1995
Springer
13 years 11 months ago
Bidirectional Object Layout for Separate Compilation
Existing schemes for object layout and dispatch in the presence of multiple inheritance and separate compilation waste space and are slower than systems with single inheritance. T...
Andrew C. Myers
ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
13 years 11 months ago
Speculation Techniques for Improving Load Related Instruction Scheduling
State of the art microprocessors achieve high performance by executing multiple instructions per cycle. In an out-oforder engine, the instruction scheduler is responsible for disp...
Adi Yoaz, Mattan Erez, Ronny Ronen, Stéphan...
ICIP
2002
IEEE
14 years 9 months ago
Channel adapted multiple description coding scheme using wavelet transform
A challenge of image communication over unreliable channels is to achieve good compression rates and be effective in presence of channel failures. In this work we use the Multiple...
Manuela Pereira, Marc Antonini, Michel Barlaud
LMO
2000
13 years 8 months ago
A Metamodel for Concurrent, Object-based Programming
The development of flexible and reusable concurrent object-oriented programming ions has suffered from the inherent problem that reusability and extensibility is limited due to pos...
Jean-Guy Schneider, Markus Lumpe