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ICCD
2001
IEEE
140views Hardware» more  ICCD 2001»
14 years 4 months ago
Cost-effective Hardware Acceleration of Multimedia Applications
General-purpose microprocessors augmented with SIMD execution units enhance multimedia applications by exploiting data level parallelism. However, supporting/overhead related inst...
Deependra Talla, Lizy Kurian John
DATE
2008
IEEE
107views Hardware» more  DATE 2008»
14 years 2 months ago
Instruction Set Extension Exploration in Multiple-Issue Architecture
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chun...
CAL
2006
13 years 7 months ago
A case for fault tolerance and performance enhancement using chip multi-processors
This paper makes a case for using multi-core processors to simultaneously achieve transient-fault tolerance and performance enhancement. Our approach is extended from a recent late...
Huiyang Zhou
EUROPAR
2005
Springer
14 years 1 months ago
Non-uniform Instruction Scheduling
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
Joseph J. Sharkey, Dmitry V. Ponomarev
DAC
2006
ACM
14 years 8 months ago
Exploiting forwarding to improve data bandwidth of instruction-set extensions
Application-specific instruction-set extensions (custom instructions) help embedded processors achieve higher performance. Most custom instructions offering significant performanc...
Ramkumar Jayaseelan, Haibin Liu, Tulika Mitra