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ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
14 years 21 days ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
DAC
1995
ACM
14 years 15 days ago
A Transformation-Based Approach for Storage Optimization
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
Wei-Kai Cheng, Youn-Long Lin
ICCD
2002
IEEE
146views Hardware» more  ICCD 2002»
14 years 5 months ago
From ASIC to ASIP: The Next Design Discontinuity
A variety of factors is making it increasingly difficult and expensive to design and manufacture traditional Application Specific Integrated Circuits (ASICs). This has started a s...
Kurt Keutzer, Sharad Malik, A. Richard Newton
ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
14 years 2 months ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
PDPTA
2003
13 years 10 months ago
An Interactive Tuning Support for Processor Allocation of Data-Driven Realtime Programs
This paper presents the effectiveness of an interactive support facility to tune processor allocation of data-driven realtime programs on CUE (Coordinating Users’ requirements an...
Yasuhiro Wabiko, Hiroaki Nishikawa