377 search results - page 63 / 76 » Multiple Instruction Stream Processor |
IEEEINTERACT
2002
IEEE
14 years 18 days ago
2002
IEEE
Embedded systems require control of many concurrent real-time activities, leading to system designs which feature multiple hardware peripherals with each providing a specific, ded...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
ISPASS
2006
IEEE
14 years 1 months ago
2006
IEEE
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
PLDI
2010
ACM
14 years 22 days ago
2010
ACM
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chi...