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SAT
2009
Springer
79views Hardware» more  SAT 2009»
14 years 4 months ago
Minimizing Learned Clauses
Minimizing learned clauses is an effective technique to reduce memory usage and also speed up solving time. It has been implemented in MINISAT since 2005 and is now adopted by mos...
Niklas Sörensson, Armin Biere
JAIR
2007
132views more  JAIR 2007»
13 years 10 months ago
New Inference Rules for Max-SAT
Exact Max-SAT solvers, compared with SAT solvers, apply little inference at each node of the proof tree. Commonly used SAT inference rules like unit propagation produce a simpli...
Chu Min Li, Felip Manyà, Jordi Planes
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
14 years 4 months ago
Integrating observability don't cares in all-solution SAT solvers
— All-solution Boolean satisfiability (SAT) solvers are engines employed to find all the possible solutions to a SAT problem. Their applications are found throughout the EDA in...
Sean Safarpour, Andreas G. Veneris, Rolf Drechsler
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
14 years 6 months ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
FPL
2003
Springer
119views Hardware» more  FPL 2003»
14 years 3 months ago
Hardware Implementations of Real-Time Reconfigurable WSAT Variants
Local search methods such as WSAT have proven to be successful for solving SAT problems. In this paper, we propose two host-FPGA (Field Programmable Gate Array) co-implementations,...
Roland H. C. Yap, Stella Z. Q. Wang, Martin Henz