117 search results - page 4 / 24 » NOC architecture design for multi-cluster chips |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
DSD
2003
IEEE
14 years 27 days ago
2003
IEEE
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
ITNG
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
IEEEHPCS
2010
13 years 6 months ago
2010
Network-on-chip (NoC) architectures adopted for Systemon-Chip (SoC) are characterized by different trade-offs between latency, throughput, communication load, energy consumption, ...
PDP
2010
IEEE
14 years 2 months ago
2010
IEEE
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...