19 search results - page 3 / 4 » Nanometer Device Scaling in Subthreshold Circuits |
ISCAS
2005
IEEE
14 years 29 days ago
2005
IEEE
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
ISLPED
2009
ACM
14 years 1 months ago
2009
ACM
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
GLVLSI
2010
IEEE
14 years 4 days ago
2010
IEEE
Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...
ISMVL
2008
IEEE
14 years 1 months ago
2008
IEEE
Nanoscale multiple-valued logic systems require the development of nanometer scale integrated circuits and components. Due to limits in device physics, new components must be deve...