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PPOPP
2010
ACM
14 years 4 months ago
Leveraging parallel nesting in transactional memory
Exploiting the emerging reality of affordable multi-core architeces through providing programmers with simple abstractions that would enable them to easily turn their sequential p...
João Barreto, Aleksandar Dragojevic, Paulo ...
SAC
2002
ACM
13 years 7 months ago
Automatic code generation for executing tiled nested loops onto parallel architectures
This paper presents a novel approach for the problem of generating tiled code for nested for-loops using a tiling transformation. Tiling or supernode transformation has been widel...
Georgios I. Goumas, Maria Athanasaki, Nectarios Ko...
DATE
2005
IEEE
155views Hardware» more  DATE 2005»
14 years 1 months ago
Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing
Fueled by an unprecedented desire for convenience and self-service, consumers are embracing embedded technology solutions that enhance their mobile lifestyles. Consequently, we wi...
Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangy...
ASPLOS
2006
ACM
14 years 1 months ago
Supporting nested transactional memory in logTM
Nested transactional memory (TM) facilitates software composition by letting one module invoke another without either knowing whether the other uses transactions. Closed nested tr...
Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore...
DATE
2005
IEEE
171views Hardware» more  DATE 2005»
14 years 1 months ago
Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems
As compared to a large spectrum of performance optimizations, relatively little effort has been dedicated to optimize other aspects of embedded applications such as memory space r...
Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, ...