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ISCAS
2006
IEEE
100views Hardware» more  ISCAS 2006»
14 years 23 days ago
Decoders for low-density parity-check convolutional codes with large memory
— Low-density parity-check convolutional codes offer the same good error-correcting performance as low-density parity-check block codes while having the ability to encode and dec...
Stephen Bates, L. Gunthorpe, Ali Emre Pusane, Zhen...
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
14 years 24 days ago
An interprocedural code optimization technique for network processors using hardware multi-threading support
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
Hanno Scharwächter, Manuel Hohenauer, Rainer ...
TC
2010
13 years 5 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
ICMCS
2005
IEEE
113views Multimedia» more  ICMCS 2005»
14 years 10 days ago
Network-Adaptive Frame-Expansion-Based Packet Video Coding for Erasure Channels
This paper proposes a novel error-resilient packet video coding method which is designed to operate on unreliable IP networks suffering from large bursts of packet losses. The mai...
Andrew G. Backhouse, Irene Y. H. Gu
WD
2010
13 years 4 months ago
Efficient MCS selection for MBSFN transmissions over LTE networks
Long Term Evolution (LTE), the next-generation network beyond 3G, is designed to support the explosion in demand for bandwidth-hungry multimedia services that are already experienc...
Antonios G. Alexiou, Christos Bouras, Vasileios Ko...