264 search results - page 12 / 53 » Network-on-Chip Architecture Exploration Framework |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
MICRO
2002
IEEE
14 years 11 days ago
2002
IEEE
Recently, graphics hardware architectures have begun to emphasize versatility, offering rich new ways to programmatically reconfigure the graphics pipeline. In this paper, we exp...
DSN
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
The Sesame modeling and simulation framework aims at early and thus efficient system-level design space exploration of embedded multimedia system architectures. So far, Sesame onl...