Sciweavers

43 search results - page 6 / 9
» Networks on Chips: A New SoC Paradigm
Sort
View
CCECE
2006
IEEE
14 years 1 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
DSN
2005
IEEE
14 years 1 months ago
On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core
1 In sub-micron technology circuits high integration levels coupled with the increased sensitivity to soft errors even at ground level make the task of guaranteeing systems’ depe...
Paolo Bernardi, Leticia Maria Veiras Bolzani, Maur...
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
14 years 27 days ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
14 years 26 days ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 2 months ago
High level H.264/AVC video encoder parallelization for multiprocessor implementation
— H.264/AVC (Advanced Video Codec) is a new video coding standard developed by a joint effort of the ITU-TVCEG and ISO/IEC MPEG. This standard provides higher coding efficiency r...
Hajer K. Zrida, Abderrazek Jemai, Ahmed C. Ammari,...